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ucb-bar/chipyard

An Agile RISC-V SoC Design Framework with in-order cores, out-of-order cores, accelerators, and more

ScalaBSD-3-ClauseActively maintained · Pushed 2d ago#accelerators #boom #chip-generator #chipyard #chisel #firesim #hwacha #out-of-order

DocumentationOpen on GitHub

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